An interactive simulator for digital combinational and sequential logic. The project aims to create a verificative and educational tool with an intuitive and responsive user interface. A user of the finished software can construct a logic circuit by selecting components from a library and then connect them together in permissible ways whilst logical and aesthetic design rules are enforced. These circuits can then be stored to disk for later modification or simulated and logged over time to produce a graphical representation of the state of the circuit at user chosen locations. The application can be easily extended with custom component libraries, and user created sub-circuits. The software is written in Java(TM) and was developed as a 3rd Year Project by two undergraduate Computer Science students from Worcester College, Oxford, UK in 2009. Their individual project reports are included in the download section for prosperity. Currently the project is not being active
此项目提供了一个交互式的数字组合逻辑和时序逻辑模拟器。它旨在成为一个既能验证电路功能，又具有教育意义的工具，并拥有直观且响应迅速的用户界面。
该软件允许用户通过从组件库中选择元件来构建逻辑电路，然后以允许的方式将它们连接起来。在构建过程中，系统会强制执行逻辑和美学设计规则，确保电路的正确性和清晰度。用户可以将构建好的电路保存到磁盘，以便后续修改，也可以对电路进行模拟和记录，随着时间的推移生成电路在用户选择位置的状态的图形表示。
该应用具有良好的可扩展性，用户可以轻松地添加自定义组件库和创建用户子电路。这使得该模拟器不仅适用于学习和教学，也适用于专业设计和验证数字逻辑电路。它提供了一个动态的环境，让用户能够深入理解数字逻辑的工作原理，并通过实践来提升设计能力。